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Other - Engineering & Technology in Folsom
Johnson Controls Inc
Building Automation Controls Systems Engineer
Bachelor's degree in engineering3 years relevant experienceHvac and building control systems design$73,400.00-$102,000.00 py
The role involves supporting the design, configuration, and operation of complete building automation and control systems to ensure performance meets project requirements
Folsom, California, USFull time+3y experienceJob Match ScoreCreate Profile
56 days agoIntel Retiree Medical Plan Trust
Senior Ai Soc Architect
10+ years soc architecture experiencePcie expertise requiredLead cross-discipline teams$223,470.00-361,200.00 usd py
The role involves defining and leading the development of next-generation Intel AI SoC Architecture from early pathfinding through execution
Folsom, California, USFull time+10y experienceJob Match ScoreCreate Profile56 days agoIntel
Gpu Performance Engineer
Proven knowledge of gpu architectureExperience with modern 3d rendering techniquesHands-on experience with rtl debugs$141,910.00-269,100.00 usd py
The candidate will focus on optimizing modern workloads to achieve best-in-class performance for Intel's new Graphics Processing Units
Folsom, California, USFull time+6y experienceJob Match ScoreCreate Profile62 days agoIntel
Gpu Logic Design Engineer
Rtl design and systemverilog codingGpu or cpu architecture experience7 years industry experience with bachelor's$122,440.00-232,190.00 usd py
You will play a critical role in shaping the future of graphics and compute technologies by defining GPU IP designs
Folsom, California, USHybridFull time+7y experienceJob Match ScoreCreate Profile62 days agoIntel
Physical Design Engineer - Cpu Core
2+ years vlsi circuit design experience1+ years static timing analysisLow power design methodologies$105,650.00-200,340.00 usd py
This role involves executing the complete physical design flow for custom CPU designs from RTL to manufacturing-ready GDS
Folsom, California, USHybridFull time+2y experienceJob Match ScoreCreate Profile66 days agoIntel Corporation
Physical Design Engineer - Cpu Core
2+ years vlsi circuit design experience1+ years static timing analysis experience1+ years low power design methodologies$105,650.00-200,340.00 usd py
This role involves executing the complete physical design flow for custom CPU designs from RTL to manufacturing-ready GDS
Folsom, California, USHybridFull time+2y experienceJob Match ScoreCreate Profile66 days agoIntel
Senior Design Verification Engineer- Mixed Signal Ip
Design verification experienceSystem verilog and ovm/uvm proficiencyMixed signal microarchitecture specifications$164,470.00-311,890.00 usd py
Intel is committed to relentless innovation and transforming technology
Folsom, California, USHybridFull time+8y experienceJob Match ScoreCreate Profile67 days agoIntel
Soc Design Engineer
Verilog and system verilog experiencePower and area efficient rtl designExperience in semiconductor industry$164,470.00-311,890.00 usd py
The role involves developing logic design and RTL coding for graphics IPs
Folsom, California, USOn-siteFull time+4y experienceJob Match ScoreCreate Profile67 days agoIntel
Gpu Physical Design Engineer Lead
Asic designs for integrated/discrete graphics and ai socsSoc level physical design and optimization flowsLeading edge process technology and eda tools$190,610.00-269,100.00 usd py
The team is responsible for all SoC level physical design and optimization flows ranging from Floor-planning, Clocking, Synthesis through GDS and parallel verification aspects such as Static Timing Analysis, Formal Verification, EM/IR/PDN verification, Quality Assurance, Layout Verification etc
Folsom, California, USHybridFull time+9y experienceJob Match ScoreCreate Profile71 days agoIntel
Cpu Core Logic Designer
Cpu core logic designRtl coding and simulationSystem verilog/verilog/vhdl$122,440.00-232,190.00 usd py
Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs
Folsom, California, USHybridFull time+6y experienceJob Match ScoreCreate Profile71 days agoIntel Retiree Medical Plan Trust
Senior Dft Timing Signoff Engineer (sta)
Primetime-based dft-mode timing constraintsTessent dft architecture and implementationStreaming scan network (ssn) concepts$164,470.00-269,100.00 usd py
We are seeking a highly skilled and hands-on DFT/STA Engineer to join our full-chip timing organization supporting next-generation AI processors
Folsom, California, USFull time+8y experienceJob Match ScoreCreate Profile71 days agoIntel
Senior Dft Timing Signoff Engineer (sta)
Dft timing signoffPrimetime-based timing constraintsTessent dft architecture$164,470.00-269,100.00 usd py
We are seeking a highly skilled and hands-on DFT/STA Engineer to join our full-chip timing organization supporting next-generation AI processors
Folsom, California, USFull time+8y experienceJob Match ScoreCreate Profile71 days agoIntel Corporation
Senior Dft Timing Signoff Engineer (sta)
Primetime-based dft-mode timing constraintsTessent dft architecture and implementationStreaming scan network (ssn)$164,470.00-269,100.00 usd py
We are seeking a highly skilled and hands-on DFT/STA Engineer to join our full-chip timing organization supporting next-generation AI processors
Folsom, California, USHybridFull time+8y experienceJob Match ScoreCreate Profile71 days agoIntel
Cpu Core Senior Physical Design Engineer
Cpu physical design implementationRtl to gds flowSynthesis, place and route$164,470.00-232,190.00 py
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing
Folsom, California, USHybrid+6y experienceJob Match ScoreCreate Profile72 days agoIntel
Cpu Core Physical Design Engineer
Physical design implementationCpu physical design flowStatic timing analysis$105,650.00-200,340.00 usd py
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing
Folsom, California, USHybrid+1y experienceJob Match ScoreCreate Profile72 days agoIntel
Cpu Core Pre-si Validation/verification Eng
Cpu internals validationCpu integration validationValidation methodologies and test plans$141,910.00-200,340.00 usd py
Defines, develops, and performs functional validation for CPUs, focusing on validation of the CPU internals and CPU integration in system level features for Intel performance and power efficient cores
Folsom, California, USOn-site+3y experienceJob Match ScoreCreate Profile72 days agoIntel
Cpu Core Pre-si Validation/verification Eng
Cpu internals validationCpu integration validationValidation methodologies and test plans$141,910.00-200,340.00 usd py
Defines, develops, and performs functional validation for CPUs, focusing on validation of the CPU internals and CPU integration in system level features for Intel performance and power efficient cores
Folsom, California, USOn-site+3y experienceJob Match ScoreCreate Profile72 days agoSierra Nevada Corporation Inc
Sr Fpga Firmware Engineer
Fpga hdl development, simulation and analysisVhdl languageDigital circuit concepts$143,487.14 - $197,294.82 py
Firmware engineers at Sierra Nevada Corporation research, design, develop, test, certify, deploy and improve cutting edge products and services
Folsom, CA, USExperience requiredJob Match ScoreCreate Profile73 days agoIntel Corporation
Soc Design Engineer
Rtl coding and simulationGraphics ips designPower, performance, area, and timing goals$164,470.00-311,890.00 py
Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs
Folsom, California, USOn-site+4y experienceJob Match ScoreCreate Profile73 days agoIntel Corporation
Cpu Core Senior Physical Design Engineer
Physical design implementationCpu microarchitecturesEda vendor collaboration$164,470.00-232,190.00 usd py
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing
Folsom, California, USHybrid+6y experienceJob Match ScoreCreate Profile73 days agoIntel Retiree Medical Plan Trust
Soc Design Engineer
Rtl coding and simulationGraphics ip designPower, performance, area, and timing goals$164,470.00-311,890.00 usd py
Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs
Folsom, California, USOn-site+4y experienceJob Match ScoreCreate Profile73 days agoIntel Retiree Medical Plan Trust
Cpu Core Pre-si Validation/verification Eng
Cpu internals validationCpu integration validationValidation methodologies and test plansAnnual salary range for jobs which could be perfor...
Responsibilities include defining, developing, and performing functional validation for CPUs, focusing on validation of CPU internals and CPU integration in system level features
Folsom, California, USOn-site+3y experienceJob Match ScoreCreate Profile73 days agoIntel Retiree Medical Plan Trust
Cpu Core Physical Design Engineer
Cpu physical design flowVlsi circuit design and synthesisStatic timing analysis$105,650.00-200,340.00 usd py
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing
Folsom, California, USHybrid+1y experienceJob Match ScoreCreate Profile73 days agoIntel Retiree Medical Plan Trust
Cpu Core Senior Physical Design Engineer
Cpu physical designRtl to gds implementationTiming closure$164,470.00-232,190.00 usd py
Performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready for manufacturing
Folsom, California, US+6y experienceJob Match ScoreCreate Profile73 days agoSierra Nevada Corporation
Sr Fpga Firmware Engineer
Fpga hdl developmentVhdl language utilizationDigital circuit concepts$143,487.14 - $197,294.82 py
Firmware engineers research, design, develop, test, certify, deploy and improve cutting edge products and services
Folsom, CA, USOn-siteMid-levelJob Match ScoreCreate Profile73 days ago
