Senior Design Verification Engineer- Mixed Signal Ip

Intel

Folsom, California, US
Base: $164,470.00-311,890.00 usd; bonus/equity: no...
Hybrid
Design verification experience
System verilog and ovm/uvm proficiency
Mixed signal microarchitecture specifications
Intel is seeking a Senior Design Verification Engineer specializing in mixed signal IP to join their team in California. The role involves verifying mixed signal logic components and collaborating with various engineering teams to ensure designs meet specifications

Job Summary

  • Intel is committed to relentless innovation and transforming technology.
  • The role involves collaborating with various teams to improve verification processes.
  • Employees enjoy a competitive compensation package and a hybrid work model.

Matching Summary

Match Score: 85

Intel is seeking a Senior Design Verification Engineer specializing in mixed signal IP to join their team in California. The role involves verifying mixed signal logic components and collaborating with various engineering teams to ensure designs meet specifications.

Salary

Base: $164,470.00-311,890.00 USD; Bonus/Equity: Not specified; Benefits: health, retirement, vacation

Skills & Requirements

Must-have

  • Design verification experience
  • System Verilog and OVM/UVM proficiency
  • Mixed signal microarchitecture specifications

Nice-to-have

  • Scripting skills in Python/Perl
  • Knowledge of DDRPHY validation
  • Exposure to Formal Property Verification

Key Requirements

  • BS degree in relevant field with 8+ years experience
  • MS degree with 6+ years experience
  • PhD with 4+ years experience

Work Rights

Not specified

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