Level 2: $91,800 to $124,200; level 3: $112,200 to...
Fpga design tools
Hardware description language (hdl)
High-speed serial interfaces (serdes)
Develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware for Advanced Processors
Job Summary
Develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware for Advanced Processors.
Stay current on industry best practices and technological advancements in FPGA design and Digital Signal Processing.
This position offers relocation based on candidate eligibility and provides a Total Rewards package including competitive base pay and variable compensation opportunities.
Matching Summary
Develop, debug, and integrate processor subsystem features and interfaces in FPGA hardware for Advanced Processors.
Salary
Level 2: $91,800 to $124,200; Level 3: $112,200 to $151,800; Level 4: $136,850 to $185,150; Benefits: Health insurance, retirement savings plans, life and disability insurance
Skills & Requirements
Must-have
FPGA design tools
Hardware Description Language (HDL)
high-speed serial interfaces (SERDES)
cross-functional team collaboration
Digital Signal Processing (DSP)
Nice-to-have
aerospace design techniques
troubleshooting and debugging
FPGA life cycle experience
working with Versal FPGAs
Key Requirements
1+ years related experience (Level 2)
3+ years related experience (Level 3)
5+ years related experience (Level 4)
Bachelor of Science degree in Engineering, Computer Science, or related field