Cpu Core Senior Physical Design Engineer

Intel Retiree Medical Plan Trust

Folsom, California, United States
Base: $164,470.00-232,190.00 usd; bonus/equity: st...
Hybrid
Vlsi circuit design and synthesis experience
Static timing analysis expertise
Low power design methodologies
This job posting seeks a Senior Physical Design Engineer for CPU core design at Intel, requiring significant experience in VLSI design and low power design methodologies. The role involves collaboration with various teams to optimize CPU designs for performance and efficiency while adhering to high manufacturing standards

Job Summary

  • The role involves performing physical design implementation of custom CPU designs from RTL to GDS to create a database ready for manufacturing.
  • Candidates will conduct all aspects of the CPU physical design flow including synthesis, place and route, clock tree synthesis, and static timing analysis.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, retirement plans, and vacation time.

Matching Summary

Match Score: 85

This job posting seeks a Senior Physical Design Engineer for CPU core design at Intel, requiring significant experience in VLSI design and low power design methodologies. The role involves collaboration with various teams to optimize CPU designs for performance and efficiency while adhering to high manufacturing standards.

Salary

Base: $164,470.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • VLSI circuit design and synthesis experience
  • Static timing analysis expertise
  • Low power design methodologies
  • Bachelor's degree in STEM field
  • 6+ years of relevant experience

Nice-to-have

  • x86 CPU architecture knowledge
  • Tcl/Perl/Python programming skills
  • Collaboration with EDA vendors
  • Methodology development experience

Key Requirements

  • Bachelor's degree in Computer Engineering or related STEM field
  • Master's degree in Computer Engineering or related STEM field
  • 6+ years of VLSI experience (or 4+ with Master's)
  • Experience in Static Timing Analysis
  • Experience in Low Power Design

Work Rights

Not specified

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