Join our dynamic Test Timing Engineering team, a group of passionate experts dedicated to ensuring robust and accurate timing constraints for advanced chip designs
Job Summary
Join our dynamic Test Timing Engineering team, a group of passionate experts dedicated to ensuring robust and accurate timing constraints for advanced chip designs.
As a Test Timing Engineer, you will play a pivotal role in developing and validating timing constraints that ensure the accuracy and reliability of advanced chip designs.
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
Matching Summary
Join our dynamic Test Timing Engineering team, a group of passionate experts dedicated to ensuring robust and accurate timing constraints for advanced chip designs.
Skills & Requirements
Must-have
Static Timing Analysis (STA)
developing and validating timing constraints
SDC flows and validation processes
PrimeTime
scripting languages (Perl, TCL, Python)
Nice-to-have
collaborative and supportive environment
continuous learning
cross-functional collaboration
debugging and analyzing timing constraints for DFT modes