Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance
Job Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance.
Oversee the development and delivery of verification of IPs owned by the team, ensuring alignment with QPDS/releases and driving innovation in verification methodologies.
Perform hands-on technical verification lead, owning the verification on IPs for FPGA, developing verification plans, test benches, and verification environments.
Matching Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance.
Skills & Requirements
Must-have
FPGA IP verification
System Verilog
OVM/UVM
constrained random verification
simulation tools
Nice-to-have
Ethernet/PCIe/PIPE expertise
collaboration with cross-functional teams
technical leadership
proactive mindset
Key Requirements
10+ years of experience in verification
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field