Standard Cell Design Reliability Verification Engineer
Inteelabs
Bangalore, India
Hybrid
Ir and em flows for standard cells
Synopsys primelib rv, primesimemir
Ansys rhsc and cadence voltus tools
Lead Reliability verification and capabilities for standard cells covering EM, SH, FinFet self-heating; layout compliance for reliability conditions
Job Summary
Lead Reliability verification and capabilities for standard cells covering EM, SH, FinFet self-heating; layout compliance for reliability conditions.
Build and release EMT, Thermal and Plimit (Power-switch) collaterals for Standard cell library for internal and external customers for Intel's newest process technologies after validation sign-off.
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
Matching Summary
Lead Reliability verification and capabilities for standard cells covering EM, SH, FinFet self-heating; layout compliance for reliability conditions.
Skills & Requirements
Must-have
IR and EM flows for Standard cells
Synopsys Primelib RV, PrimesimEMIR
Ansys RHSC and Cadence Voltus tools
Reliability verification in lower nm nodes
Digital circuit design, CMOS logic
Strong Python programming and automation
Nice-to-have
Customer oriented and dynamic environment
Collaboration across geographically distributed teams
Develop expertise in new areas
Engineering acumen and analytical skills
Key Requirements
Master's degree with 5+ years experience or PhD with 1+ years experience