Senior Digital/ams Validation And Integration Engineer

NXP

San Jose, California, US
Base: $166,200 to $228,500 annually; bonus/equity:...
Rtl design and integration
Static timing analysis expertise
Python scripting for automation
The role involves driving the integration of complex digital logic into Automotive SerDes transceivers

Job Summary

  • The role involves driving the integration of complex digital logic into Automotive SerDes transceivers.
  • You will own the path from RTL through timing closure and support validation in the lab.
  • NXP offers competitive benefits including health, dental, and vision insurance.

Matching Summary

The role involves driving the integration of complex digital logic into Automotive SerDes transceivers.

Salary

Base: $166,200 to $228,500 annually; Bonus/Equity: Not specified; Benefits: Health, dental, and vision insurance, 401(k), paid leave

Skills & Requirements

Must-have

  • RTL design and integration
  • Static Timing Analysis expertise
  • Python scripting for automation

Nice-to-have

  • Experience with Automotive Ethernet standards
  • Familiarity with high-speed Analog Front Ends
  • Knowledge of Design for Test

Key Requirements

  • BSEE/MSEE with 5–8+ years of experience
  • Advanced proficiency in SystemVerilog/Verilog
  • Strong understanding of clock domain crossing

Work Rights

Not specified

Tailored Resume

Cover Letter