AAC Technologies Pte. Ltd. is seeking a Senior RTL Design Engineer with a strong background in digital CMOS IC design. The role involves mixed-signal subsystem design, RTL logic design using Verilog HDL, and pre-silicon verification, requiring at least 7 years of relevant experience
Job Summary
The role involves designing mixed-signal subsystems from implementation to final delivery for chip-level integration.
Candidates will perform micro-architectural studies to determine optimal hardware implementations for digital blocks.
Pre-silicon verification includes using UVM test benches and FPGA emulation to ensure design quality.
Matching Summary
Match Score: 85
AAC Technologies Pte. Ltd. is seeking a Senior RTL Design Engineer with a strong background in digital CMOS IC design. The role involves mixed-signal subsystem design, RTL logic design using Verilog HDL, and pre-silicon verification, requiring at least 7 years of relevant experience.
Skills & Requirements
Must-have
Verilog HDL RTL design
I2C I2S SoundWire interface design
UVM constrained random verification
Logic synthesis timing power analysis
Digital CMOS IC design experience
Nice-to-have
High-level modelling language proficiency
FPGA emulation support experience
Spice co-simulation skills
Cross-functional team collaboration
Key Requirements
Bachelor or Master degree in Electrical and Electronic Engineering
Minimum 7+ years of professional experience in digital CMOS IC design
Experience with high-level modelling tools for subsystem evaluation