Asic Sta Engineer

Cisco UK

Base: $135,800.00 to $195,100.00; bonus/equity: el...
Bachelor's degree in electrical or computer engineering
5+ years of asic design experience
Verilog/systemverilog programming skills
The role involves developing methodologies and guidelines to streamline static timing analysis work for next-generation optical interconnects

Job Summary

  • The role involves developing methodologies and guidelines to streamline static timing analysis work for next-generation optical interconnects.
  • Candidates will collaborate with the Physical Design team to resolve design issues and drive execution for accuracy and progress.
  • Cisco offers competitive compensation including base salary ranges up to $252,000 depending on location, along with equity and comprehensive benefits.

Matching Summary

The role involves developing methodologies and guidelines to streamline static timing analysis work for next-generation optical interconnects.

Salary

Base: $135,800.00 to $195,100.00; Bonus/Equity: Eligible for restricted stock units and annual bonuses; Benefits: Medical, dental, vision, 401(k), paid time off

Skills & Requirements

Must-have

  • Bachelor's degree in Electrical or Computer engineering
  • 5+ years of ASIC Design experience
  • Verilog/SystemVerilog programming skills

Nice-to-have

  • Prior STA experience is a plus
  • Strong written and verbal communication skills
  • Experience with cross-functional team collaboration

Key Requirements

  • Bachelor's degree in Electrical or Computer engineering
  • Master's degree in Electrical or Computer Engineering with 3+ years experience
  • PhD with 0 years experience
  • 5+ years of ASIC Design experience

Work Rights

Not specified

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