Our team works closely with Physical Design, STA, Power, Physical Verification, and Front-End teams to enable efficient execution, consistent QoR, and reliable tape-outs
Job Summary
Our team works closely with Physical Design, STA, Power, Physical Verification, and Front-End teams to enable efficient execution, consistent QoR, and reliable tape-outs.
As a Physical Design Flow & Methodology Engineer, you will take end-to-end ownership of key portions of the PD flow, contributing to implementation and signoff methodology from synthesis handoff through GDS delivery.
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
Matching Summary
Our team works closely with Physical Design, STA, Power, Physical Verification, and Front-End teams to enable efficient execution, consistent QoR, and reliable tape-outs.
Skills & Requirements
Must-have
RTL-to-GDS Physical Design implementation
timing, power, and physical verification signoff
scripting language (Tcl, Python, or Shell)
debug flow, tool, and QoR issues
Nice-to-have
flow automation and methodology enhancements
ASIC signoff collateral
multi-voltage design experience
mentoring junior engineers
Key Requirements
5+ years of experience in ASIC Physical Design
Hands-on experience with Physical Design implementation and tools
Strong understanding of RTL-to-GDS Physical Design flow
Solid experience with timing, power, and physical verification signoff