This role provides the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions
Job Summary
This role provides the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions.
As a Senior DFT Design Engineer, you will be responsible for DFT architecture and implementation, including DFT specifications, test logic insertion, test mode timing constraints, ATPG, and pre-silicon validation.
You will also contribute to the development of DFT methodologies and flows to improve pre-silicon and post-silicon validation processes.
Matching Summary
This role provides the opportunity to work on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions.
Salary
$142,600 - $206,500 USD
Skills & Requirements
Must-have
DFT architecture and implementation
test logic insertion
ATPG pattern generation
pre-silicon validation
scripting languages (Perl/TCL)
Nice-to-have
test compression
BIST (MBIST/LBIST)
advanced fault models
2.5D/3D multi-die designs
high-speed IO/SerDes DFT
Key Requirements
Bachelor’s degree in EE/CE or related field with 7+ years of industry experience
Master’s degree in EE/CE or related field with 5+ years of industry experience