Staff Asic Ip/block/subsystem Design Verification Engineer

Micron Technology

Hyderabad, India
Ip/block/subsystem verification
Amba protocols-apb/ahb/axi
Systemverilog/uvm testbench development
Responsible for overall IP/Block and sub-system verification from test plan creation, SystemVerilog/UVM testbench development to signoff

Job Summary

  • Responsible for overall IP/Block and sub-system verification from test plan creation, SystemVerilog/UVM testbench development to signoff.
  • Ensure first pass product through multi-dimensional verification coverage including mixed mode verification.
  • Pair with similar domain specialists across other geographical locations on core technical initiatives.

Matching Summary

Responsible for overall IP/Block and sub-system verification from test plan creation, SystemVerilog/UVM testbench development to signoff.

Skills & Requirements

Must-have

  • IP/Block/Subsystem verification
  • AMBA protocols-APB/AHB/AXI
  • SystemVerilog/UVM testbench development
  • RTL debugging
  • functional coverage coding
  • code coverage analysis

Nice-to-have

  • mixed mode verification
  • mentoring junior team members
  • cross functional teams
  • globally dispersed teams

Key Requirements

  • 6+ Years Experience
  • Working experience on AXI/AHB protocols
  • Working experience on IP/Block/Subsystem Verification
  • Expert in System Verilog and UVM methodology
  • M.S./M.Tech, BS/BE (Electronics)

Work Rights

Not specified

Tailored Resume

Cover Letter