Principle/staff Sta Engineer

NXP Semiconductors

Noida, India
Static timing analysis (sta)
Timing constraints (sdc)
Timing violations debugging
Lead and perform comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting-edge semiconductor designs

Job Summary

  • Lead and perform comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting-edge semiconductor designs.
  • Collaborate closely with design, DFT, physical design, and verification teams to ensure timing closure and meet project deadlines.
  • Mentor and provide technical guidance to junior engineers, fostering a culture of continuous learning and improvement.

Matching Summary

Lead and perform comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting-edge semiconductor designs.

Skills & Requirements

Must-have

  • Static Timing Analysis (STA)
  • timing constraints (SDC)
  • timing violations debugging
  • Synopsys PrimeTime
  • Cadence Tempus
  • Tcl, Perl, Python scripting

Nice-to-have

  • leadership or mentorship role
  • continuous learning and improvement
  • global team environment collaboration

Key Requirements

  • 6+ years relevant experience (Staff Engineer)
  • 9+ years relevant experience (Principle Engineer)
  • Bachelor's or Master's degree in Electronics Engineering
  • Experience with various technology nodes (28nm, 16nm, 7nm, 5nm)

Work Rights

Not specified

Tailored Resume

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