Standard Cell Design Reliability Verification Engineer
Intel
Bangalore, India
Hybrid
Master's degree with 5+ years experience
Ir and em flows for standard cells
Synopsys primelib rv and primesimemir tools
This role focuses on leading reliability verification capabilities for standard cells covering electromigration, self-heating, and layout compliance in advanced nodes
Job Summary
This role focuses on leading reliability verification capabilities for standard cells covering electromigration, self-heating, and layout compliance in advanced nodes.
The successful candidate will drive engagement with internal partners and external EDA vendors to coordinate tool feature requirements and specifications for reliability verification.
Candidates must possess a Master's degree with 5+ years of industry experience or a PhD with 1+ years in VLSI and related fields.
Matching Summary
This role focuses on leading reliability verification capabilities for standard cells covering electromigration, self-heating, and layout compliance in advanced nodes.
Skills & Requirements
Must-have
Master's degree with 5+ years experience
IR and EM flows for Standard cells
Synopsys Primelib RV and PrimesimEMIR tools
Ansys RHSC and Cadence Voltus expertise
FinFet characteristics and device physics knowledge
Python programming and automation skills
Standard Cell Library design and layout
Nice-to-have
Experience with Design Compiler and Genus tools
Cross-functional team collaboration skills
Debugging problems and driving solutions
Strategic initiatives for future technologies
Customer-oriented dynamic environment work
External EDA vendor engagement experience
Key Requirements
Master's degree with 5+ years relevant experience
PhD degree with 1+ year relevant experience
VLSI specialization in Electronics or Electrical Engineering
Strong Python programming and automation skills
In-depth understanding of EM and IR flow methodologies