Design Verification Eng Undergraduate Intern

Inteelabs

Jerusalem, Israel
Hybrid
Functional logic verification
Silicon designs
Verification plans
Contributes to the functional logic verification of silicon designs to ensure specifications are met

Job Summary

  • Contributes to the functional logic verification of silicon designs to ensure specifications are met.
  • Supports the development of verification plans, test benches, and development of the verification environment to ensure coverage of the architecture.
  • As an intern, learns and applies knowledge, builds skills, and explores future career opportunities through hands-on experience and projects that support Intel business goals in a collaborative environment.

Matching Summary

Contributes to the functional logic verification of silicon designs to ensure specifications are met.

Skills & Requirements

Must-have

  • functional logic verification
  • silicon designs
  • verification plans
  • test benches
  • verification environment
  • emulation and simulation
  • root cause and debug

Nice-to-have

  • collaborative environment
  • hands-on experience
  • future career opportunities
  • uncover bugs
  • corrective measures

Key Requirements

  • BSc in Electrical Engineering
  • At least two years remaining in degree
  • At least 20 hours per week availability
  • Excellent verbal and written English skills

Work Rights

Not specified

Tailored Resume

Cover Letter