Senior Design Automation Engineer - Front End Design Verification

Altera

San Jose, California, United States
Base: $178,900 - $259,000 usd; bonus/equity: incen...
Front end rtl and design verification experience
Eda tools vcs xcelium spyglass proficiency
Unix linux scripting python tcl shell skills
The role involves developing advanced design automation flows to support Altera's FPGA design processes from RTL to GDSII

Job Summary

  • The role involves developing advanced design automation flows to support Altera's FPGA design processes from RTL to GDSII.
  • Candidates will leverage AI-driven tools and systems to streamline complex design processes and improve overall productivity.
  • The position requires collaborating with cross-functional teams to identify workflow bottlenecks and implement impactful process improvements.

Matching Summary

The role involves developing advanced design automation flows to support Altera's FPGA design processes from RTL to GDSII.

Salary

Base: $178,900 - $259,000 USD; Bonus/Equity: Incentive opportunities available based on performance; Benefits: Not specified

Skills & Requirements

Must-have

  • Front End RTL and Design Verification experience
  • EDA tools VCS Xcelium SpyGlass proficiency
  • Unix Linux scripting Python Tcl Shell skills
  • AI-driven features in commercial EDA tools
  • Flow automation tools and complex pipeline integration

Nice-to-have

  • 10+ years relevant industry experience
  • Front End Pre-Silicon design verification flows
  • Advanced Lint CDC RDC feature familiarity
  • Strong cross-functional collaboration skills
  • Large-scale SoC or IP development background

Key Requirements

  • Bachelor's or Master's degree in Computer Science or Electrical Engineering
  • 8+ years of relevant industry experience required
  • Eligibility for U.S. export authorizations

Work Rights

Must be eligible for U.S. export authorizations

Tailored Resume

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