Senior Verification Engineer

Altera Digital Health

Jerusalem, Israel
Systemverilog/uvm
Constrained-random verification
Coverage-driven verification
Our team develops and verifies high-speed SerDes IP, the physical layer technology that moves data at speeds from 10Gbps to 100Gbps+ across PCIe, Ethernet, and other industry-standard interfaces

Job Summary

  • Our team develops and verifies high-speed SerDes IP, the physical layer technology that moves data at speeds from 10Gbps to 100Gbps+ across PCIe, Ethernet, and other industry-standard interfaces.
  • Own and execute constrained-random and coverage-driven verification of high-speed SerDes mixed-signal IP.
  • A collaborative and innovative environment where great ideas come from every level of the team.

Matching Summary

Our team develops and verifies high-speed SerDes IP, the physical layer technology that moves data at speeds from 10Gbps to 100Gbps+ across PCIe, Ethernet, and other industry-standard interfaces.

Skills & Requirements

Must-have

  • SystemVerilog/UVM
  • constrained-random verification
  • coverage-driven verification
  • Python scripting for automation
  • digital design and computer architecture
  • mixed-signal IP verification

Nice-to-have

  • formal verification tools
  • high-speed protocols
  • DSP algorithm verification
  • AI-assisted engineering tools

Key Requirements

  • 4–7 years of hands-on experience
  • Bachelor's or Master's degree

Work Rights

Not specified

Tailored Resume

Cover Letter