This role involves executing the full physical design flow from synthesis to tape-out for complex digital integrated circuits
Job Summary
This role involves executing the full physical design flow from synthesis to tape-out for complex digital integrated circuits.
Candidates will perform critical tasks including floorplanning, power planning, place and route, and static timing analysis to meet performance targets.
The position requires strong collaboration with design, verification, and DFT teams to ensure seamless integration and project milestone achievement.
Matching Summary
This role involves executing the full physical design flow from synthesis to tape-out for complex digital integrated circuits.
Skills & Requirements
Must-have
Physical design flow execution
Static timing analysis (STA)
Floorplanning and place and route
Clock tree synthesis
Power integrity analysis
DRC LVS Antenna verification
Tcl Perl Python scripting
Nice-to-have
Design-for-test implementation
Continuous improvement methodologies
Collaborative team environment
Deep sub-micron process knowledge
Automation script development
Key Requirements
Bachelor's or Master's degree in Electronics Engineering
Minimum 4 years experience in digital physical design
Proficiency with Synopsys Fusion Compiler or Cadence Innovus
Experience with deep sub-micron process technologies