Staff Engineer, Digital Design Engineering

Analog Devices

Beaverton, Oregon, United States
$134,644 to $201,966; bonus: performance-based; be...
High-speed serdes ic design
Verilog and systemverilog rtl design
Digital architecture and design
Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit-speed serial interfaces and video and data routing solutions

Job Summary

  • Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit-speed serial interfaces and video and data routing solutions.
  • Provide technical leadership for complex SerDes subsystems and products, collaborating across analog, digital, verification, test, and product definition teams.
  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.

Matching Summary

Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit-speed serial interfaces and video and data routing solutions.

Salary

$134,644 to $201,966; Bonus: performance-based; Benefits: medical, vision, dental, 401k, paid time off

Skills & Requirements

Must-have

  • High-speed SerDes IC design
  • Verilog and SystemVerilog RTL design
  • Digital architecture and design
  • Mixed-signal integration support
  • Silicon bring-up and debug

Nice-to-have

  • Technical leadership experience
  • Industry standards committee participation
  • Behavioral modeling for mixed-signal systems

Key Requirements

  • 5+ years relevant experience with MSEE
  • 3+ years relevant experience with PhD
  • Experience designing and verifying complex digital systems
  • Ability to architect and plan designs at system level
  • Hands-on silicon bring-up and debug experience

Work Rights

Export licensing review may be required for non-US citizens

Tailored Resume

Cover Letter