The role involves driving middle-end design activities including synthesis, DFT, STA, ECO, and signoff for IP development projects
Job Summary
The role involves driving middle-end design activities including synthesis, DFT, STA, ECO, and signoff for IP development projects.
Candidates are expected to support implementation for advanced IP programs such as eUSB2v2 and UCIe AP/SP developments across multiple technology nodes.
The position requires exploring and applying AI/LLM-assisted methodologies to improve debug efficiency and engineering productivity.
Matching Summary
The role involves driving middle-end design activities including synthesis, DFT, STA, ECO, and signoff for IP development projects.
Skills & Requirements
Must-have
Digital IC design experience
Synthesis DFT STA ECO signoff
Tcl Python Perl Shell scripting
Nice-to-have
AI-assisted design methodologies
Flow automation expertise
Cross-functional collaboration skills
Key Requirements
Bachelor's or Master's degree in Electrical Engineering