Staff Engineer - Asic Sta

Micron Technology

Mixed-signal asic digital team
High-speed ips (onfi & ddr phy, serdes)
Front-end implementation
The position is part of a Mix-Signal ASIC digital team responsible for high-speed IPs and IO buffer Chips from spec to post silicon characterization

Job Summary

  • The position is part of a Mix-Signal ASIC digital team responsible for high-speed IPs and IO buffer Chips from spec to post silicon characterization.
  • Responsibilities include front-end implementation, synthesis, LEC, low power flows, and STA/Timing closure, collaborating with design, DV, and PD teams.
  • The role involves mentoring, customizing flows, and ensuring quality delivery for synthesis and timing closure, with an equal opportunity and excellent pay package.

Matching Summary

The position is part of a Mix-Signal ASIC digital team responsible for high-speed IPs and IO buffer Chips from spec to post silicon characterization.

Skills & Requirements

Must-have

  • Mixed-Signal ASIC digital team
  • High-speed IPs (ONFI & DDR PHY, SerDes)
  • Front-end implementation
  • Synthesis, LEC, Low power flows
  • Pre-layout and post-layout STA/Timing closure
  • Debug experience and automation
  • Multi-GHz designs critical paths

Nice-to-have

  • Transform how the world uses information
  • Inspiring the world to learn, communicate and advance
  • Commitment to integrity, sustainability, and giving back
  • Cross-functional and globally dispersed teams

Key Requirements

  • 6+ Years Experience
  • M.S./M.Tech, BS/BE (Electronics) qualification
  • Proven ability to understand complex IPs
  • Working knowledge of low power designing
  • Good written & verbal communication skills

Work Rights

Not specified

Tailored Resume

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