Senior To Senior Staff, Digital Design Engineer

Marvell

Ho Chi Minh, Vietnam
Rtl implementation with verilog
On-chip bus protocols knowledge
Timing closure analysis
Marvell’s semiconductor solutions are essential building blocks of data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential building blocks of data infrastructure.
  • You will design high-performance AI silicon and critical high-speed interface IP designs.
  • The role offers competitive salary, premium health insurance, and generous paid leave policies.

Matching Summary

Marvell’s semiconductor solutions are essential building blocks of data infrastructure.

Skills & Requirements

Must-have

  • RTL implementation with Verilog
  • On-Chip bus protocols knowledge
  • Timing closure analysis

Nice-to-have

  • Experience as a technical lead
  • Basic understanding of UVM test bench
  • Scripting knowledge with Python

Key Requirements

  • Minimum BSEE plus 5 years of design experience
  • Basic understanding of scripting/programming languages
  • Performing Lint and CDC checks

Work Rights

Not specified

Tailored Resume

Cover Letter