Sr. Soc Design Verification Engineer

Indclutch

Bengaluru, India
**
Uvm methodology
System verilog language
Design for debug architecture
** Indclutch is seeking a Sr. SoC Design Verification Engineer in Bengaluru, India, who will be responsible for pre-silicon system verification and developing test cases using UVM methodology. The ideal candidate should have over 10 years of experience in complex ASIC designs and strong communication skills to coordinate with cross-functional teams. **

Job Summary

  • As a Sr. SoC Design Verification Engineer, you will be responsible for Design for Debug architecture verification related tasks including creating test cases and test bench using UVM methodology.
  • Capacity could include full chip and/or system functional verification with defining verification strategies, methodology and test plan to enable effective verification.
  • Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan.

Matching Summary

Match Score: 75

** Indclutch is seeking a Sr. SoC Design Verification Engineer in Bengaluru, India, who will be responsible for pre-silicon system verification and developing test cases using UVM methodology. The ideal candidate should have over 10 years of experience in complex ASIC designs and strong communication skills to coordinate with cross-functional teams. **

Skills & Requirements

Must-have

  • UVM methodology
  • System Verilog language
  • Design for Debug architecture
  • cross functional efforts

Nice-to-have

  • Emulation experience
  • scripting in Linux/Unix
  • Perl and/or Python proficiency
  • ARM and RISC Debug Architectures

Key Requirements

  • 10+ years of experience
  • complex ASIC designs and/or verification
  • UVM verification methodology
  • formal verification method
  • Experience with Design for Debug architecture
  • Experience with ARM and RISC Debug Architectures

Work Rights

Not specified

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