Ip Methodology And Automation Engineer

Intel Corporation

Austin, Texas, United States
Base: $141,910.00-269,100.00 usd; bonus/equity: st...
Hybrid
Physical design implementation
Rtl to gds flows
Power, performance, area, timing optimization
You will drive innovation in the development and enhancement of tools, flows, and methods essential for Intel's physical design implementation across IPs and SoCs

Job Summary

  • You will drive innovation in the development and enhancement of tools, flows, and methods essential for Intel's physical design implementation across IPs and SoCs.
  • Key responsibilities include conceptualizing, documenting, and designing TFMs, establishing regression flows, and developing methodologies to optimize power, performance, area, and timing.
  • We offer a total compensation package that ranks among the best in the industry, consisting of competitive pay, stock bonuses, and benefit programs.

Matching Summary

You will drive innovation in the development and enhancement of tools, flows, and methods essential for Intel's physical design implementation across IPs and SoCs.

Salary

Base: $141,910.00-269,100.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • Physical design implementation
  • RTL to GDS flows
  • Power, performance, area, timing optimization
  • CAD-based automation
  • TCL and PERL scripting

Nice-to-have

  • Cross-functional team collaboration
  • Continuous improvement of testing processes
  • Scalability and performance optimization

Key Requirements

  • Bachelors with 8+ years of experience or Master's degree with 4+ years of experience or PhD with 2+ years of experience
  • Expertise with EDA tools, physical design flows, and methodologies
  • Experience with SoC integration and RTL to GDS design flows
  • Hands-on experience with design optimization techniques
  • Experience with multi-power plane designs and UPF methodologies
  • Expert-level proficiency in Python, Perl, Tcl, and SKILL
  • Full-stack development experience
  • Hands-on experience with Jenkins, GitLab CI platforms, SQL/NoSQL databases
  • Deep understanding of semiconductor IP design flow

Work Rights

Not specified

Tailored Resume

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