Senior Asic Dv Engineer

Broadcom

Multiple Locations
Base: $141,300 - $226,000; bonus/equity: discretio...
Architecting verification environments using uvm
Mixed-signal simulation knowledge ams spice
Debugging rtl and gate simulations
You will contribute to the development of complex SOCs targeted towards Touch Controllers, Wireless Charging Chips, and other new initiatives

Job Summary

  • You will contribute to the development of complex SOCs targeted towards Touch Controllers, Wireless Charging Chips, and other new initiatives.
  • Broadcom offers a competitive and comprehensive benefits package including medical, dental, vision, 401(K) with company matching, ESPP, EAP, paid holidays, sick leave, and vacation time.
  • The annual base salary range for this position is $141,300 - $226,000 and it is eligible for discretionary annual bonus and equity awards.

Matching Summary

You will contribute to the development of complex SOCs targeted towards Touch Controllers, Wireless Charging Chips, and other new initiatives.

Salary

Base: $141,300 - $226,000; Bonus/Equity: Discretionary annual bonus and equity awards; Benefits: Medical, dental, vision, 401(K) matching, ESPP, EAP, paid leave

Skills & Requirements

Must-have

  • Architecting verification environments using UVM
  • Mixed-signal simulation knowledge AMS Spice
  • Debugging RTL and Gate simulations
  • Low power silicon verification with UPF flow
  • Verification of SOCs with embedded CPUs
  • Writing diagnostics for FPGA prototype validation

Nice-to-have

  • Automating verification flows with scripting
  • Converting verification tests to test patterns
  • Collaborating with Test Engineers on ATE vector bring up

Key Requirements

  • Bachelors with 12+ years experience or Masters with 10+ years or PhD with 7+ years
  • MS or PhD preferred
  • Experience with low power verification and UPF flow

Work Rights

Not specified

Tailored Resume

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