Senior Logic Design Engineer, Cache Coherent Interconnects

Invidia

Multiple Locations
Base: 136,000 usd - 218,500 usd; bonus/equity: not...
Hybrid
Verilog expertise
Rtl design
Asic design flow
You will be responsible for the design of CPU on-chip and off-chip interconnect networks

Job Summary

  • You will be responsible for the design of CPU on-chip and off-chip interconnect networks.
  • This position offers you the opportunity to have real impact in a technology-focused company.
  • NVIDIA is widely considered to be one of the technology world’s most desirable employers.

Matching Summary

You will be responsible for the design of CPU on-chip and off-chip interconnect networks.

Salary

Base: 136,000 USD - 218,500 USD; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • Verilog expertise
  • RTL design
  • ASIC design flow

Nice-to-have

  • Mentoring junior engineers
  • Strong communication skills
  • Dynamic global team

Key Requirements

  • Master’s Degree in relevant field
  • 5+ years of experience in semiconductor designs
  • Strong background in computer architecture

Work Rights

Not specified

Tailored Resume

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