Bachelor's degree in electrical engineering or computer science
3+ years industry experience in verification methodologies
2+ years experience with uvm or systemverilog
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The job posting is for a Soc Pre-silicon Verification Engineer at Intel Retiree Medical Plan Trust in Guadalajara, Mexico. The role involves validating integrated SoC designs through functional logic verification and requires candidates to have significant experience in verification methodologies.
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Job Summary
This role involves performing functional logic verification of an integrated SoC to ensure the design meets all microarchitecture specifications.
Candidates will collaborate with architects and developers to define scalable verification plans and execute complex emulation and system simulations.
The position requires absorbing lessons from post-silicon validation to improve future pre-silicon test plans and security coverage.
Matching Summary
Match Score: 75
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The job posting is for a Soc Pre-silicon Verification Engineer at Intel Retiree Medical Plan Trust in Guadalajara, Mexico. The role involves validating integrated SoC designs through functional logic verification and requires candidates to have significant experience in verification methodologies.
**
Salary
Not specified; Not specified; Not specified
Skills & Requirements
Must-have
Bachelor's degree in Electrical Engineering or Computer Science
3+ years industry experience in verification methodologies
2+ years experience with UVM or SystemVerilog
Advanced English language proficiency
Nice-to-have
4+ years SystemVerilog and UVM experience
Experience with ARM-based SoC architectures
Proficiency in Python for test automation
Knowledge of C/C++ and scripting languages
Experience with formal verification tools
Key Requirements
Bachelor's degree with 3+ years experience OR Master's with 2+ years
Minimum 2 years experience in UVM or SystemVerilog