Staff Digital Verification Engineer

Alphawave IP

Toronto, Canada
Verilog/systemverilog coding
Uvm and verification techniques
Constrained-random verification
Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world

Job Summary

  • Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world.
  • Own the end-to-end verification of new features and optimizations, build/enhance testbenches, and analyze test failures to uncover design bugs.
  • We have a flexible work environment to support and help employees thrive in personal and professional capacities, with competitive benefits including health plans and flexible time off.

Matching Summary

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world.

Skills & Requirements

Must-have

  • Verilog/SystemVerilog coding
  • UVM and verification techniques
  • constrained-random verification
  • RTL design and MATLAB models
  • 3rd party VIP integration
  • scripting and Linux/Unix environment

Nice-to-have

  • enthusiastic and innovative
  • flexible work environment
  • proactive health management
  • continuous improvement mindset

Key Requirements

  • Bachelor or Master degree in Computer or Electrical Engineering
  • ASIC design verification experience
  • Applied understanding of UVM
  • Experience with constrained-random verification
  • Formal Verification and Power-aware UPF
  • Experience with delivering to multiple programs
  • Strong initiative and independently capable

Work Rights

Not specified

Tailored Resume

Cover Letter