Validation Engineering Ip Program Manager, Principal

Marvell Technology

Base: $163,940 - $245,600 py; bonus/equity: not sp...
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Soc ip development and validation
Cross-functional leadership in analog logic design
Silicon development process methodology
** Marvell Technology is seeking a Principal Validation Engineering IP Program Manager to lead and manage the IP development and validation for their semiconductor products. The ideal candidate will have extensive experience in the semiconductor industry, particularly in mixed signal design and program management, and will be responsible for ensuring successful delivery and collaboration across cross-functional teams. **

Job Summary

  • The role involves driving the complete lifecycle of IP development and validation from conception through Mass Production Release for Marvell's product businesses.
  • Candidates must demonstrate strong cross-functional leadership to chair weekly meetings and provide regular program updates to executive stakeholders.
  • Marvell offers comprehensive benefits including an employee stock purchase plan, family support programs, and robust mental health resources.

Matching Summary

Match Score: 75

** Marvell Technology is seeking a Principal Validation Engineering IP Program Manager to lead and manage the IP development and validation for their semiconductor products. The ideal candidate will have extensive experience in the semiconductor industry, particularly in mixed signal design and program management, and will be responsible for ensuring successful delivery and collaboration across cross-functional teams. **

Salary

Base: $163,940 - $245,600 per annum; Bonus/Equity: Not specified; Benefits: Employee stock purchase plan, family support, mental health resources

Skills & Requirements

Must-have

  • SoC IP development and validation
  • Cross-functional leadership in analog logic design
  • Silicon development process methodology
  • IP spec closure and requirement management
  • Risk management and lessons learned execution

Nice-to-have

  • Excellent verbal and written communication skills
  • Strong interpersonal relationship building
  • Experience with advanced process technologies
  • Matrixed leadership of distributed engineering managers

Key Requirements

  • BS in Electrical Engineering with MSEE preferred or Master's/PhD
  • 10-15 years experience with BS or 5-10 years with Master's/PhD
  • 6+ years as Engineering Project Manager in Semiconductor industry
  • 6+ years experience as mixed signal IP designer
  • Eligible to access export-controlled information under US law

Work Rights

Must be eligible to access export-controlled information (US citizens, lawful permanent residents, or protected individuals)

Tailored Resume

Cover Letter