Principal Product Engineer System Verification, Emulation

Cadence Design Systems Inc.

San Jose, CA, US
Base: $136,500 to $253,500; bonus/equity: eligible...
7+ years rtl verification experience
Hardware assisted verification expertise
Verilog/systemverilog proficiency
Independently drive Palladium hardware emulation engagements with customers from initial deployment through advanced use-case enablement

Job Summary

  • Independently drive Palladium hardware emulation engagements with customers from initial deployment through advanced use-case enablement.
  • Partner closely with R&D teams to validate new capabilities and influence the product roadmap based on real-world customer requirements.
  • Join a Fortune 100 Best Companies to Work For organization offering competitive benefits including 401(k) matching and stock purchase plans.

Matching Summary

Independently drive Palladium hardware emulation engagements with customers from initial deployment through advanced use-case enablement.

Salary

Base: $136,500 to $253,500; Bonus/Equity: Eligible for incentive compensation; Benefits: Paid vacation, 401(k) match, medical/dental/vision

Skills & Requirements

Must-have

  • 7+ years RTL verification experience
  • Hardware assisted verification expertise
  • Verilog/SystemVerilog proficiency
  • C/C++ and Python programming skills
  • Linux-based development environment knowledge

Nice-to-have

  • FPGA based design experience
  • Strong analytical problem-solving skills
  • Technical mentorship capabilities

Key Requirements

  • Bachelor's degree with 7+ years experience or Master's with 5+ years
  • 6-8 years hands-on RTL verification experience
  • PhD with minimum 1 year of experience

Work Rights

Not specified

Tailored Resume

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