Sr. Asic Layout Design Engineer

Teledyne Technologies Incorporated

Base: $113,600.00-$151,400.00; bonus/equity: not s...
High-quality analog/mixed-signal ic layouts
Cadence and siemens software tools
Design rule checks (drc) compliance
Teledyne Technologies is seeking a Senior Analog/Mixed-Signal Layout Design Engineer to develop high-performance focal-plane array readout integrated circuits

Job Summary

  • Teledyne Technologies is seeking a Senior Analog/Mixed-Signal Layout Design Engineer to develop high-performance focal-plane array readout integrated circuits.
  • The role involves producing detailed semiconductor device layouts and collaborating with circuit designers for optimal performance.
  • Candidates must be US Citizens or PERM Residents and have over 10 years of industry experience.

Matching Summary

Teledyne Technologies is seeking a Senior Analog/Mixed-Signal Layout Design Engineer to develop high-performance focal-plane array readout integrated circuits.

Salary

Base: $113,600.00-$151,400.00; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • High-quality analog/mixed-signal IC layouts
  • Cadence and Siemens software tools
  • Design Rule Checks (DRC) compliance

Nice-to-have

  • Excellent communication skills
  • Ability to work in multidisciplinary teams
  • Programming skills in SKILL, TCL, Shell, or Python

Key Requirements

  • Bachelor’s degree in engineering or related field
  • 10+ years of industry experience
  • Expertise in analog/mixed-signal layout design for CMOS circuits

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter