Senior Product Development Engineer

Altera Corporation

Penang, Malaysia
Full chip test methods
On-chip dft definition
Test vector generation
Develop full chip test methods, on-chip DFT definition and verification, test vector generation and coverage analysis, ATE program development, and 1st silicon debug for Intel's FPGA products

Job Summary

  • Develop full chip test methods, on-chip DFT definition and verification, test vector generation and coverage analysis, ATE program development, and 1st silicon debug for Intel's FPGA products.
  • Collaborate with worldwide cross-functional teams including designers, software, manufacturing, and product engineering, as you drive for test capability throughout the entire product development cycle.
  • Drive test optimizations to reduce test cost, enhance product quality, improve manufacturing efficiency and accelerate manufacturing stability.

Matching Summary

Develop full chip test methods, on-chip DFT definition and verification, test vector generation and coverage analysis, ATE program development, and 1st silicon debug for Intel's FPGA products.

Skills & Requirements

Must-have

  • Full chip test methods
  • On-chip DFT definition
  • Test vector generation
  • ATE program development
  • First silicon debug
  • Test capability throughout product development

Nice-to-have

  • Self-motivated
  • Collaboration and leadership skills
  • Test industry trends and technology

Key Requirements

  • BS/MS in Electrical Engineering or equivalent
  • 8-10 years industry experience
  • Expert understanding of memory test methodology
  • Proven experience in DFT definition development
  • Silicon bring-up and ATE experience
  • Strong digital or analog circuit fundamentals

Work Rights

Not specified

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