Silicon Packaging Design Engineer

Intel Retiree Medical Plan Trust

Phoenix, Arizona, United States
Base: $105,650.00-149,150.00 usd; bonus/equity: st...
Microelectronic package or pcb physical layout design
Siemens xpedition or cadence allegro
Substrate design physical layout aspects
You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability

Job Summary

  • You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability.
  • Collaborate with cross-functional teams to optimize pinout and silicon-package-board interactions.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Matching Summary

You will be responsible for the end-to-end development of substrate designs, from concept through tape-out, ensuring optimal performance, cost efficiency, and manufacturability.

Salary

Base: $105,650.00-149,150.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, and vacation

Skills & Requirements

Must-have

  • microelectronic package or PCB physical layout design
  • Siemens Xpedition or Cadence Allegro
  • substrate design physical layout aspects
  • physical layout and routing of package designs
  • substrate fit and routing studies

Nice-to-have

  • strong analytical and problem-solving skills
  • creative solutions for debugging
  • scripting using Python, VB, C

Key Requirements

  • Bachelors with 1+ years of experience or Master's with 6 months
  • 6+ months experience with microelectronic package/PCB layout
  • Familiarity with package design tools
  • Familiarity with substrate design physical layout

Work Rights

Not specified

Tailored Resume

Cover Letter