The role involves developing and owning SoC subsystem designs including CPU, interconnects, and memory hierarchy for advanced embedded applications
Job Summary
The role involves developing and owning SoC subsystem designs including CPU, interconnects, and memory hierarchy for advanced embedded applications.
Candidates must execute hands-on RTL design activities such as Lint, CDC, timing optimization, and low-power design verification.
The position requires collaborating with cross-functional teams like DV, Synthesis, DFT, and Physical Design to ensure PPA optimization and successful tape-outs.
Matching Summary
The role involves developing and owning SoC subsystem designs including CPU, interconnects, and memory hierarchy for advanced embedded applications.