Dft Application Engineer

Intel

Phoenix, Arizona, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
3+ years advanced cmos process experience
Asic dft/dfm insertion implementation
Atpg validation and timing signoff
This role provides critical technical support to Aerospace, Defense, and Government customers to ensure successful tape-outs using cutting-edge silicon technology

Job Summary

  • This role provides critical technical support to Aerospace, Defense, and Government customers to ensure successful tape-outs using cutting-edge silicon technology.
  • The engineer will drive quality improvements in ASIC DFT/DFM methodologies while collaborating with internal teams and external stakeholders to resolve complex technical issues.
  • Intel offers competitive compensation, stock bonuses, and professional development opportunities within a hybrid work model supporting national security through advanced semiconductor solutions.

Matching Summary

This role provides critical technical support to Aerospace, Defense, and Government customers to ensure successful tape-outs using cutting-edge silicon technology.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • 3+ years advanced CMOS process experience
  • ASIC DFT/DFM insertion implementation
  • ATPG validation and timing signoff
  • Python Perl Tcl shell scripting skills

Nice-to-have

  • Customer-focused attitude and mindset
  • Experience with 7nm and below processes
  • Hands-on design implementation methodology
  • Technical direction to engineering teams

Key Requirements

  • US Citizenship required
  • Bachelor's degree in Electrical or Computer Engineering
  • Ability to obtain US Government Security Clearance
  • 3+ years combined experience in ASIC DFT/DFM
  • 2+ years scripting experience in Python Perl Tcl or shell

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter