Phy Digital Lead

Marvell

Bangalore, India
Micro-architecture design
Verilog/vhdl experience
Soc architecture understanding
Marvell’s semiconductor solutions are essential building blocks of data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential building blocks of data infrastructure.
  • As a Principal Design Engineer, you will lead micro-architecture and RTL development.
  • You will enjoy competitive compensation and great benefits in a collaborative environment.

Matching Summary

Marvell’s semiconductor solutions are essential building blocks of data infrastructure.

Skills & Requirements

Must-have

  • Micro-architecture design
  • Verilog/VHDL experience
  • SoC architecture understanding

Nice-to-have

  • Domain expertise in UCIe
  • Experience with CXL/PCIe protocols

Key Requirements

  • Bachelor’s degree in related fields
  • 10-15 years of related experience
  • Hands on experience with Perl/Python

Work Rights

Not specified

Tailored Resume

Cover Letter