Technical Leader Dft & Sta

Cisco UK

8+ years related work experience
Block/full chip sdc development
Static timing analysis (sta) expertise
Join the Silicon One Team at Cisco to define innovative Physical Design methodologies for advanced process nodes

Job Summary

  • Join the Silicon One Team at Cisco to define innovative Physical Design methodologies for advanced process nodes.
  • You will develop timing constraints at block, sub-chip, and full-chip levels while collaborating with cross-functional teams.
  • The role requires deep analytical skills to resolve design issues and drive execution for complex chip partitions.

Matching Summary

Join the Silicon One Team at Cisco to define innovative Physical Design methodologies for advanced process nodes.

Skills & Requirements

Must-have

  • 8+ years related work experience
  • Block/full chip SDC development
  • Static Timing Analysis (STA) expertise
  • Synopsys PrimeTime tool proficiency
  • Scripting skills in Perl TCL Python

Nice-to-have

  • Master's degree in engineering
  • Debugging timing constraints
  • Strong communication skills
  • Team player with empathy
  • Experience with Fusion Compiler

Key Requirements

  • Bachelor's degree in electrical or computer engineering
  • Minimum 8 years of related work experience
  • Expertise in STA tools like PrimeTime
  • Proficiency in scripting languages including Perl, TCL, and Python

Work Rights

Not specified

Tailored Resume

Cover Letter