Senior Dft Design Engineer

Altera

San Jose, California, United States
Base: $142,600 - $206,500 usd; bonus/equity: incen...
Dft design and verification at rtl and gate level
Experience with eda tools synthesis scan insertion atpg
Design automation experience scripting languages perl tcl
The role involves defining and implementing DFT architectures for cutting-edge technologies including FPGA, processors, and multi-die packaging

Job Summary

  • The role involves defining and implementing DFT architectures for cutting-edge technologies including FPGA, processors, and multi-die packaging.
  • Candidates will collaborate with IP and integration teams to align DFT features with complex circuit functionality and timing.
  • The position offers the opportunity to contribute to DFT methodology flows that enhance pre-silicon and post-silicon validation processes.

Matching Summary

The role involves defining and implementing DFT architectures for cutting-edge technologies including FPGA, processors, and multi-die packaging.

Salary

Base: $142,600 - $206,500 USD; Bonus/Equity: Incentive opportunities based on performance; Benefits: Not specified

Skills & Requirements

Must-have

  • DFT design and verification at RTL and gate level
  • Experience with EDA tools synthesis scan insertion ATPG
  • Design automation experience scripting languages Perl TCL

Nice-to-have

  • Experience with test compression BIST MBIST LBIST
  • Prior experience with 2.5D/3D multi-die designs
  • High-speed IO SerDes DFT knowledge

Key Requirements

  • Bachelor's degree with 7+ years industry experience OR Master's with 5+ years
  • Eligible for required U.S. export authorizations

Work Rights

Must be eligible for U.S. export authorizations

Tailored Resume

Cover Letter