Lead Design Engineer ( Layout Design )

Cadence

Hyderabad, India
On-site
Custom layout design for high-speed ips
Physical verifications (drc, lvs, emir)
Analog/mixed-signal layout design experience
Perform custom layout design for NextGen, high-speed IPs like SerDes/DDR/GDDR/LPDDR/Pcie/D2D/HBM/Ucie/Chiplets

Job Summary

  • Perform custom layout design for NextGen, high-speed IPs like SerDes/DDR/GDDR/LPDDR/Pcie/D2D/HBM/Ucie/Chiplets.
  • Perform physical verifications including Full Spectrum Verifications as per foundry requirements, DRC, LVS, EMIR and Reliability Compliance.
  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.

Matching Summary

Perform custom layout design for NextGen, high-speed IPs like SerDes/DDR/GDDR/LPDDR/Pcie/D2D/HBM/Ucie/Chiplets.

Skills & Requirements

Must-have

  • Custom layout design for high-speed IPs
  • Physical verifications (DRC, LVS, EMIR)
  • Analog/mixed-signal layout design experience
  • Latest technology nodes experience
  • Understanding layout effects on circuit performance

Nice-to-have

  • Scripting and automation experience
  • Co-creation mindset with stakeholders
  • Agile adaptation to market needs

Key Requirements

  • 5 – 7 years or equivalent relevant experience
  • BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent
  • Hands-on experience in analog/mixed-signal layout design
  • Hands on layout experience in various analog IP like High-speed Analog (Serdes), Data converters, power management and PLL etc.
  • Worked on latest technology nodes like 18a, 2nm, 3nm, 5nm, 7nm and below

Work Rights

Not specified

Tailored Resume

Cover Letter