Digital Design Engineer, Principal

Marvell

Santa Clara, CA, United States
Base: 182,360 - 273,200; bonus/equity: not specifi...
System-on-chip architecture
Verilog rtl optimization
Hw/sw co-design experience
Marvell’s semiconductor solutions are essential for data infrastructure

Job Summary

  • Marvell’s semiconductor solutions are essential for data infrastructure.
  • As a Principal Design Engineer, you will drive micro-architecture and RTL development.
  • Marvell offers comprehensive benefits that support employees at every stage of their careers.

Matching Summary

Marvell’s semiconductor solutions are essential for data infrastructure.

Salary

Base: 182,360 - 273,200; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • System-on-Chip architecture
  • Verilog RTL optimization
  • HW/SW co-design experience

Nice-to-have

  • Scripting in Perl and Python
  • Exceptional problem-solving skills
  • Collaboration with cross-functional teams

Key Requirements

  • Bachelor’s degree in related field
  • 10–15 years of industry experience
  • In-depth knowledge of IEEE 802.3 Ethernet standards

Work Rights

Not specified

Tailored Resume

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