Sr/ IC Design Engineer (Physical Design)

ETHOS TECH ONE PTE. LTD.

Singapore, Singapore
Rtl to gds design flow
Synopsys icc2 tool proficiency
Static timing analysis (sta)
The role involves designing and developing ICs using leading EDA software from RTL to GDS, including synthesis, layout, and routing

Job Summary

  • The role involves designing and developing ICs using leading EDA software from RTL to GDS, including synthesis, layout, and routing.
  • Candidates are responsible for GDS validation tasks such as DRC/LVS, timing closure sign-off, and scan validation across multiple projects.
  • The position requires working closely with Analog Design, Systems, Applications, and Production groups to determine product architecture.

Matching Summary

Match Score: 85

The role involves designing and developing ICs using leading EDA software from RTL to GDS, including synthesis, layout, and routing.

Skills & Requirements

Must-have

  • RTL to GDS design flow
  • Synopsys ICC2 tool proficiency
  • Static Timing Analysis (STA)
  • DRC/LVS validation experience
  • Perl and TCL scripting skills

Nice-to-have

  • Deep sub-micron routing knowledge
  • Power and noise analysis expertise
  • SOC tape-out track record
  • Cross-functional collaboration skills

Key Requirements

  • Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering
  • Minimum 1 year of relevant experience
  • Proficiency in backend design EDA tools

Work Rights

Not specified

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