Frontend Engineer

BETA CAE Systems International AG

Shanghai, China
Rtl-to-gdsii design methodology
Logic equivalence checking
Logic synthesis
To provide key technical support in digital IC design implementation

Job Summary

  • To provide key technical support in digital IC design implementation.
  • To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, including both challenging low power designs.
  • We’re doing work that matters. Help us solve what others can’t.

Matching Summary

To provide key technical support in digital IC design implementation.

Skills & Requirements

Must-have

  • RTL-to-GDSII design methodology
  • logic equivalence checking
  • logic synthesis
  • RTL debug
  • RTL timing and power analysis
  • Synthesis flow

Nice-to-have

  • Eager to learn new technologies
  • willing to promote new technologies
  • effective communication and soft skills

Key Requirements

  • Master/Bachelor's degree
  • 3+ years’ experience in IC design
  • working knowledge of one or more programming languages
  • Ability to debug logic equivalent checking issues
  • understand low power design with UPF
  • experience in STA flow

Work Rights

Not specified

Tailored Resume

Cover Letter