Principal Engineer, Design Technology Co-optimization

Intel Retiree Medical Plan Trust

Hillsboro, Oregon, US
Base: $220,920.00-311,890.00 usd; bonus/equity: st...
Hybrid
Advanced semiconductor technology understanding
Foundation ip design and dtco
Standard cell library design
The organization develops logic libraries, memories, high-speed I/Os, analog and mixed signal IPs, RF/mmWave circuits and 3D IC, and conducts comprehensive Si validation on process and package development test vehicles and FIP characterization vehicles

Job Summary

  • The organization develops logic libraries, memories, high-speed I/Os, analog and mixed signal IPs, RF/mmWave circuits and 3D IC, and conducts comprehensive Si validation on process and package development test vehicles and FIP characterization vehicles.
  • As a logic library vertical lead, you will be responsible for driving optimization of standard cell libraries on Intel's leading edge process nodes to meet internal and external foundry customer needs.
  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Matching Summary

The organization develops logic libraries, memories, high-speed I/Os, analog and mixed signal IPs, RF/mmWave circuits and 3D IC, and conducts comprehensive Si validation on process and package development test vehicles and FIP characterization vehicles.

Salary

Base: $220,920.00-311,890.00 USD; Bonus/Equity: stock bonuses; Benefits: health, retirement, vacation

Skills & Requirements

Must-have

  • Advanced semiconductor technology understanding
  • Foundation IP design and DTCO
  • Standard cell library design
  • MOSFET electrical characteristics
  • Library cell characterization methodology
  • Semiconductor foundry ecosystem experience

Nice-to-have

  • Product design experience
  • Signoff methodology understanding
  • Foundry benchmarking practices
  • EDA tool design and optimization
  • Foundation IP Si validation

Key Requirements

  • 10+ years of industry experience
  • Ph.D. or Master's degree in EE or CS
  • Position of Trust requires Background Investigation

Work Rights

Not specified

Tailored Resume

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