Staff Mixed Signal Design Verification Engineer

Qorvo Inc

Richardson, TX, US
On-site
Uvm environment
Mixed-signal concepts
Constrained random tests
Qorvo supplies innovative semiconductor solutions that make a better world possible, serving high-growth segments like consumer electronics, automotive, and aerospace/defense

Job Summary

  • Qorvo supplies innovative semiconductor solutions that make a better world possible, serving high-growth segments like consumer electronics, automotive, and aerospace/defense.
  • The Power Management division is seeking an experienced Top-level Design Verification Engineer to create next-generation power management solutions.
  • Responsibilities include developing metric-driven verification plans, creating constrained random tests in UVM, building RNM or VerilogAMS models, and collaborating with design and test teams.

Matching Summary

Qorvo supplies innovative semiconductor solutions that make a better world possible, serving high-growth segments like consumer electronics, automotive, and aerospace/defense.

Skills & Requirements

Must-have

  • UVM environment
  • mixed-signal concepts
  • constrained random tests
  • automated checkers
  • customer use-case focus
  • power-management building blocks

Nice-to-have

  • Top-Down Design Methodology
  • shell or Python scripting
  • SV Assertions and Functional coverage
  • integration of AI into verification

Key Requirements

  • 10+ years of experience in AMS design or verification
  • Advanced degree in Electrical Engineering or related field
  • Proficiency in UVM environments
  • Expertise in mixed-signal concepts

Work Rights

Not specified

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