Senior Principle Engineer - Soc Design Verification

NXP Semiconductors

Pune, India
Arm-based microcontrollers
Systemverilog, uvm
Low-power design verification
Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals

Job Summary

  • Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals.
  • Responsible for developing, debugging and running UVM based verification environment for RTL/netlist simulation.
  • Mentor team members while actively collaborating with design teams for issue resolution and sign-off.

Matching Summary

Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals.

Skills & Requirements

Must-have

  • ARM-based microcontrollers
  • SystemVerilog, UVM
  • low-power design verification
  • SoC-level verification strategy
  • RTL/netlist simulation
  • gate-level simulations
  • functional safety/security requirements

Nice-to-have

  • team mentoring
  • strategic planning
  • collaboration
  • fast-paced environment
  • stakeholder management

Key Requirements

  • 15+ years in SoC/IP verification
  • Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering
  • Proficiency in SystemVerilog, UVM
  • Experience with low-power verification (UPF)
  • Verification of multiple interfaces: SPI, I²C, UART, USB, PCIe, Ethernet, eSPI

Work Rights

Not specified

Tailored Resume

Cover Letter