Dataflow Development Engineer - Lpu Hardware Dataflow
Invidia
Multiple Locations
Fpga development and dataflow pipelines
Hardware-software co-design
Rtl/hdl programming (verilog, vhdl)
You will build and implement dataflow pipelines and streaming architectures in FPGA or programmable logic while developing host-side software and runtimes that collaborate with accelerator hardware
Job Summary
You will build and implement dataflow pipelines and streaming architectures in FPGA or programmable logic while developing host-side software and runtimes that collaborate with accelerator hardware.
The role involves partnering with compiler and hardware teams to optimize latency, efficiency, and resource utilization, and building hardware-software co-design flows from specification to validation.
NVIDIA fosters a collaborative and inclusive environment where engineers can thrive and make a significant impact on AI computing advancements.
Matching Summary
You will build and implement dataflow pipelines and streaming architectures in FPGA or programmable logic while developing host-side software and runtimes that collaborate with accelerator hardware.
Skills & Requirements
Must-have
FPGA development and dataflow pipelines
Hardware-software co-design
RTL/HDL programming (Verilog, VHDL)
Host-side driver development in C/C++
Hardware interfaces (PCIe, DMA, VFIO)
FPGA toolchains and timing closure
Linux and scripting environment
Nice-to-have
FPGA dataflow for machine learning inference
Pass through/virtualization for accelerators
ASIC or custom-silicon dataflow experience
Compiler backend or HLS targeting FPGAs
Multi-FPGA or FPGA–GPU systems experience
Distributed dataflow across accelerators
Excellent English communication skills
Key Requirements
BS or higher in CS/EE/CE or equivalent experience
More than 5 years FPGA development experience
Hands-on RTL/HDL or high-level synthesis expertise
Proven understanding of dataflow and streaming concepts