Base: usd 105,500 - 213,500 annually in california...
Hybrid
System verilog/uvm testbench development
Asic functional verification
Constrained-random verification methodologies
HPE Networking Silicon group builds cutting edge networking chips used in world-class routers and switches with a start-up culture inside a large company
Job Summary
HPE Networking Silicon group builds cutting edge networking chips used in world-class routers and switches with a start-up culture inside a large company.
The role involves exposure to latest verification methodologies, collaboration with logic designers and software engineers, and opportunities for ASIC validation and leadership development.
HPE offers comprehensive health and wellbeing benefits, personal and professional development programs, and an inclusive culture that values varied backgrounds.
Matching Summary
HPE Networking Silicon group builds cutting edge networking chips used in world-class routers and switches with a start-up culture inside a large company.
Salary
Base: USD 105,500 - 213,500 annually in California; Bonus/Equity: Variable incentives may be offered; Benefits: Comprehensive suite supporting physical, financial and emotional wellbeing
Skills & Requirements
Must-have
System Verilog/UVM testbench development
ASIC functional verification
Constrained-random verification methodologies
Debugging and bug resolution collaboration
Formal verification and code coverage analysis
Nice-to-have
Mentoring interns and new graduates
Knowledge of networking protocols
Machine learning familiarity
Strong communication skills
Agile Scrum development
Growth mindset and intellectual curiosity
Key Requirements
Bachelor’s degree in Electrical Engineering or Computer Science