Principal Asic Physical Design Engineer

k2 space

Remote
Base: $190,000 – $280,000; equity: yes; benefits: ...
Remote
Rtl-to-gdsii flow ownership
Physical design methodologies and automation
Timing closure and sta sign-off
We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems

Job Summary

  • We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems.
  • Own the complete RTL-to-GDSII flow: synthesis, floorplanning, place & route, clock tree synthesis (CTS), static timing analysis (STA), physical verification (DRC/LVS), and sign-off.
  • Base salary range for this role is $190,000 – $280,000 + equity in the company.

Matching Summary

We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems.

Salary

Base: $190,000 – $280,000; Equity: Yes; Benefits: Comprehensive package

Skills & Requirements

Must-have

  • RTL-to-GDSII flow ownership
  • Physical design methodologies and automation
  • Timing closure and STA sign-off
  • Advanced FinFET process nodes
  • Managing external design partners

Nice-to-have

  • Radiation-hardened ASIC experience
  • Chip-package co-design
  • Cross-functional, distributed teams

Key Requirements

  • 10+ years ASIC physical design experience
  • Bachelor’s or Master’s degree
  • End-to-end RTL-to-GDSII expertise
  • Hands-on timing closure experience
  • Experience managing offshore/outsourced teams

Work Rights

Must be a 'U.S. Person'

Tailored Resume

Cover Letter