Principal Asic Design Verification Engineer

Blue Origin

Multiple Locations
Ca applicants is $230,773.00 - $323,081.85; wa app...
On-site
Define end-to-end verification strategy
Establish verification methodologies and infrastructure
Lead verification planning for complex communication functions
Blue Origin is seeking a Principal ASIC Design Verification Engineer to lead the verification strategy for advanced ASICs used in space-based communication systems. The role requires extensive experience in ASIC/SoC verification, particularly within the aerospace sector, and offers a collaborative and innovative work environment

Job Summary

  • The Principal ASIC Verification Engineer serves as a technical authority for verification of advanced ASICs enabling Space based communication systems.
  • Define end-to-end verification strategy for large Space based communication ASIC or SoC programs.
  • Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.

Matching Summary

Match Score: 85

Blue Origin is seeking a Principal ASIC Design Verification Engineer to lead the verification strategy for advanced ASICs used in space-based communication systems. The role requires extensive experience in ASIC/SoC verification, particularly within the aerospace sector, and offers a collaborative and innovative work environment.

Salary

CA applicants is $230,773.00 - $323,081.85; WA applicants is $230,773.00 - $323,081.85; Other site ranges may differ

Skills & Requirements

Must-have

  • Define end-to-end verification strategy
  • Establish verification methodologies and infrastructure
  • Lead verification planning for complex communication functions
  • Evaluate verification completeness through coverage and assertions
  • Resolve critical technical issues and root-cause analysis

Nice-to-have

  • Technical leadership and cross-organizational communication
  • Influence future verification roadmap and tool strategy
  • Mentor technical leaders and raise verification maturity

Key Requirements

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field
  • 12+ years of ASIC/SoC verification experience
  • Expert-level knowledge of System Verilog, UVM, assertions
  • Proven success leading verification for complex chips or multiple tape-outs

Work Rights

Must be a U.S. citizen or national, U.S. permanent resident, or lawfully admitted into the U.S.

Tailored Resume

Cover Letter